D1: Optimal ECC for Power Consumption and Power-Delay Product Reductions, and Encoding/Decoding Circuitry for the Optimal
ECC. (pdf)
D2b:
Prototyping for Fault-Tolerance, Power consumption and Power-Relay
Product Reduction (Description of the prototype). (pdf)
D3:
Optimal ECC for Crosstalk-Induced Peak Voltage Reduction and
Encoding/Decoding Circuitry for the Optimal ECC. (pdf)
D4b:
Prototyping for Fault Tolerance and Crosstalk-induced peak voltage
reduction (Description of the prototype). (pdf)
D6:
Prototyping for Fault-Tolerance and Simultaneously Switching outputs.
(Description of the prototype). (pdf)
D8b:
Prototyping
for Fault Tolerance and Combined Electrical Aspects (Description
of the prototype).
